System Technology Research Engineer - (PhD Intern)
Semiconductor Packaging Research
Likely openWe list a role only while we believe it is still open. Confirm on the posting before you apply.
What stands out
- Pay is stated up front — $141,998 – $142,002 / year. Most postings never say.
- Nobody had applied when this was listed — you would be near the front of the queue.
- Posted in the last 24 hours.
- The same role is open in 3 locations.
The gist
This internship involves working on cutting-edge semiconductor packaging technologies, focusing on system-level evaluations and method development. Ideal for PhD students with research experience in IC design, physical layout, or packaging technologies. The role offers hands-on involvement in shaping future semiconductor processing innovations.
What you would actually do
- Develop and enhance STCO methodologies for semiconductor packaging
- Evaluate 3D/2.5D dis-aggregation schemes using solder microbumps or hybrid bonding
- Collaborate with teams on system-level integration and materials analysis
Skills mentioned
How to apply
Internships in the US often collect hundreds of applicants within a day, so applying early matters more than applying perfectly. A half-finished application sent on the first morning beats a polished one sent on the third.
This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.