SOC DFT Intern - Spring 2027
DFT Implementation
Open nowConfirmed on NXP Semiconductors’s own careers page · checked
The gist
This internship involves implementing DFT techniques for SoC designs, supporting ATPG and test coverage analysis. Ideal for students with a background in digital logic and VLSI, seeking hands-on experience with industry tools. You'll contribute to real projects and learn from experienced engineers.
What you would actually do
- Implement DFT techniques like scan insertion and memory BIST
- Use Python, Perl, TCL for automation and ATPG pattern generation
- Collaborate with RTL and verification teams on testability
- Work on real silicon projects with mentorship from engineers
Skills mentioned
How to apply
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This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.