SOC DFT Intern - Spring 2027
DFT Implementation
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What stands out
- Posted in the last 24 hours.
The gist
This internship involves implementing DFT techniques for SoC designs, working with tools like Python and EDA software. Ideal for students with a background in digital logic and VLSI, seeking hands-on experience in semiconductor test methodologies.
What you would actually do
- Implement DFT techniques like scan insertion and memory BIST
- Use Python, Perl, TCL for automation and ATPG pattern generation
- Collaborate with RTL and verification teams on testability
- Work on real SoC designs with industry-standard EDA tools
Skills mentioned
About this listing
- Found on
- First seen by InternDoor
- , within 2 hours of being posted
- Last seen listed
- Application page
- nxp.wd3.myworkdayjobs.com
InternDoor has recorded 58 engineering postings from NXP Semiconductors in the US since Aug 2026. LinkedIn listings stay on InternDoor for at most 30 days after we first see them, so this one comes down by , or sooner if we find its application has closed. When it comes down, this address points to NXP Semiconductors’s page instead of a dead end.
How to apply
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This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.