Intern – DRAM Technology Physical Design and Block-Level PPA Optimization
Open nowConfirmed on Micron Technology’s own careers page · checked
The gist
The Design Technology Co-Optimization (DTCO) team works at the intersection of process technology, standard cell architecture, and design implementation to optimize power, performance, and area (PPA) for advanced memory products. The team collaborates closely with standard cell library, RTL, and physical design engineers to evaluate design tradeoffs and develop methodologies that improve silicon outcomes. As a DTCO Intern, you will gain hands-on experience assessing and optimizing PPA at the standard cell and logic block level. You will use industry-standard place-and-route tools and AI-enabled automation…
About this listing
- Found on
- Micron Technology’s careers site (Workday)
- First seen by InternDoor
- Last seen listed
- Application page
- micron.wd1.myworkdayjobs.com
InternDoor has recorded 135 engineering postings from Micron Technology in the US since Aug 2026. We keep re-checking Micron Technology’s careers site, and take this listing down after the role disappears from it or its application link stops working. When it comes down, this address points to Micron Technology’s page instead of a dead end.
How to apply
Internships in the US often collect hundreds of applicants within a day, so applying early matters more than applying perfectly. A half-finished application sent on the first morning beats a polished one sent on the third.
This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.