Device Engineering Intern, ULP CMOS (Fall 2026)
Device Engineering
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What stands out
- Pay is stated up front — $20 – $40. Most postings never say.
- Posted in the last 24 hours.
The gist
This role involves designing and optimizing ultra-low power CMOS technologies for applications like IoT and automotive. You'll work on test chip layouts, analyze device performance, and collaborate with global teams to ensure manufacturability and competitiveness. Ideal for students with a strong background in semiconductor physics and fabrication processes.
What you would actually do
- Design and optimize silicon transistor technologies for ULP CMOS products
- Use Python and CAD tools for test chip layout and analysis automation
- Collaborate with global teams on device characterization and reliability testing
Skills mentioned
About this listing
- Found on
- First seen by InternDoor
- , within 20 minutes of being posted
- Last seen listed
- Application page
- careers.gf.com
InternDoor has recorded 11 engineering postings from GlobalFoundries in the US since Aug 2026. LinkedIn listings stay on InternDoor for at most 30 days after we first see them, so this one comes down by , or sooner if we find its application has closed. When it comes down, this address points to GlobalFoundries’s page instead of a dead end.
How to apply
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This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.