ASIC Engineer Intern, Annapurna Labs - 2027
ASIC Design
Likely openWe list a role only while we believe it is still open. Confirm on the posting before you apply.
What stands out
- Pay is stated up front — $126,100 – $185,000 / year. Most postings never say.
- Only 3 people had applied when this was listed.
- Posted in the last 24 hours.
- The same role is open in 3 locations.
The gist
This internship involves working on real chip development, contributing to the design and verification of digital logic blocks. You'll collaborate with teams to bring features from specification to silicon, with mentorship and meaningful project impact.
What you would actually do
- Design RTL for digital logic blocks using Verilog/SystemVerilog
- Run verification environments to validate design functionality
- Support synthesis and timing analysis for chip development
Skills mentioned
How to apply
Internships in the US often collect hundreds of applicants within a day, so applying early matters more than applying perfectly. A half-finished application sent on the first morning beats a polished one sent on the third.
This summary was written by InternDoor from the public posting, and is not the employer's own wording. The linked posting is the source of truth — check it before you apply.